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may 2006 rev 1 1/14 14 STS4C3F30L n-channel 30v - 0.044 ? - 5a - so-8 stripfet? power mosfet general features low threshold drive standard outline for easy automated surface mount assembly description this application specific mosfet is the second generation of stmicroelectronics unique ?single feature size?? strip-based process. the resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. applications switching application internal schematic diagram type v dss r ds(on) i d STS4C3F30L (n-ch) 30v <0.055 ? 5a STS4C3F30L (p-ch) 30v <0.165 ? 3a so-8 www.st.com order codes part number marking package packaging STS4C3F30L s4c3f30l so-8 tape & reel
contents STS4C3F30L 2/14 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STS4C3F30L electrical ratings 3/14 1 electrical ratings note: for the p-channel mosfet actual polarity of voltages and current has to be reversed table 1. absolute maximum ratings symbol parameter value unit n-channel p-channel v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20 k ? )30v v gs gate- source voltage 16 v i d drain current (continuos) at t c = 25c s.o. 5 2.7 a i d drain current (continuos) at t c = 100c s.o. 3.2 1.7 a i dm (1) 1. pulse width limited by safe operating area drain current (pulsed) 20 11 a p tot total dissipation at t c = 25c d.o. total dissipation at t c = 25c s.o. 1.6 2 w w t stg storage temperature -60 to 150 w/c t j max. operating junction temperature 150 c table 2. thermal data symbol parameter value unit r thj-case thermal resistance junction-case s.o. 62.5 c/w thermal resistance junction-case d.o. 78.0 c/w t l maximum lead temperature for soldering purpose 300 c
electrical characteristics STS4C3F30L 4/14 2 electrical characteristics (t case =25c unless otherwise specified) table 3. on/off states symbol parameter test condictions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250a, v gs = 0 n-ch p-ch 30 30 v v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating,@125c n-ch p-ch 1 1 a a i gss gate-body leakage current (v ds = 0) v gs = 20v n-ch p-ch 100 100 na na v gs(th) gate threshold voltage v ds = v gs , i d = 250a n-ch p-ch 1 1 1.6 1.6 2.5 2.5 v v r ds(on) static drain-source on resistance v gs = 10v, i d = 2a v gs = 10v, i d = 1.5a v gs = 4.5v, i d = 2a v gs = 4.5v, i d = 1.5a n-ch p-ch n-ch p-ch 0.044 0.145 0.051 0.160 0.055 0.165 0.065 0.20 ? ? ? ? table 4. dynamic symbol parameter test condictions min. typ. max. unit g fs (1) 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. forward transconductance v ds >i d(on) xr ds(on)max, i d =3.5a v ds >i d(on) xr ds(on)max, i d =2a n-ch p-ch 6 4 s s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 n-ch p-ch n-ch p-ch n-ch p-ch 220 420 115 95 23 30 pf pf pf pf pf pf q g q gs q gd total gate charge gate-source charge gate-drain charge n-channel v dd = 24v, i d = 5 a v gs = 10v p-channel v dd =15v, i d = 3 a v gs = 4.5v (see figure 24) n-ch p-ch n-ch p-ch n-ch p-ch 9.5 4.8 2.25 1.7 1.7 2 2 7 nc nc nc nc nc nc
STS4C3F30L electrical characteristics 5/14 table 5. switching times symbol parameter test condictions min. typ. max unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off-delay time fall time n-channel v dd = 15v, i d = 2.5 a r g = 4.7 ?, v gs = 10v p-channel v dd = 15v, i d = 1.5 a r g = 4.7 ?, v gs = 4.5v (see figure 26) n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch 13 15 27 37 10 90 3 23 ns ns ns ns ns ns ns ns table 6. source drain diode symbol parameter test condictions min typ. max unit i sd i sdm (1) 1. pulse width limited by safe operating area. source-drain current source-drain current (pulsed) n-ch p-ch n-ch p-ch 5 3 20 12 a a a a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5 %. forward on voltage i sd = 4 a, v gs = 0 n-ch p-ch 1.2 1.2 v v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current n-channel i sd = 3.5a, di/dt=100a/s v dd = 15v, t j = 150c p-channel i sd = 3a, di/dt=100 a/s v dd = 15v, t j = 150c (see figure 28) n-ch p-ch n-ch p-ch n-ch p-ch 28 35 18 25 1.3 1.5 ns ns nc nc a a
electrical characteristics STS4C3F30L 6/14 2.1 electrical characteristics (curves) figure 1. safe operating area n-ch figure 2. thermal impedance n-ch figure 3. output characterisics n-ch figure 4. transfer characteristics n-ch figure 5. transconductance n-ch figure 6. static drain-source on resistance n-ch
STS4C3F30L electrical characteristics 7/14 figure 7. gate charge vs gate-source voltage n-ch figure 8. capacitance variations n-ch figure 9. normalized gate threshold voltage vs temperature n-ch figure 10. normalized on resistance vs temperature n-ch figure 11. source-drain diode forward characteristics n-ch
electrical characteristics STS4C3F30L 8/14 figure 12. safe operating area p-ch figure 13. thermal impedance p-ch figure 14. output characterisics p-ch figure 15. transfer characteristicsp-ch figure 16. transconductance p-ch figure 17. static drain-source on resistance p-ch
STS4C3F30L electrical characteristics 9/14 figure 18. gate charge vs gate-source voltage p-ch figure 19. capacitance variations p-ch figure 20. normalized gate threshold voltage vs temperature p-ch figure 21. normalized on resistance vs temperature p-ch figure 22. source-drain diode forward characteristics p-ch
test circuit STS4C3F30L 10/14 3 test circuit figure 23. switching times test circuit for resistive load figure 24. gate charge test circuit figure 25. test circuit for inductive load switching and diode recovery times figure 26. unclamped inductive load test circuit figure 27. unclamped inductive wavefo rm figure 28. switching time waveform
STS4C3F30L package mechanical data 11/14 4 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect . the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com
package mechanical data STS4C3F30L 12/14 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m 0.6 0.023 s 8 (max.) so-8 mechanical data
STS4C3F30L revision history 13/14 5 revision history table 7. revision history date revision changes 12-may-2006 1 first release
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